CSSE3000 - Sem 1 2008 - St Lucia - Internal

Authenticated View
Printed: 19 February 2008, 11:10PM
This printed course profile is valid at the date and time specified above. The course profile may be subject to change during the semester – the online version is the authoritative version.

1. General Course Information

1.1 Course Details

Course Code: CSSE3000 Course Title: Digital System Design
Coordinating Unit: School of Information Technology and Electrical Engineering
Semester: Semester 1, 2008    Mode: Internal
Level: Undergraduate
Location: St Lucia
Number of Units: 2    Contact Hours Per Week: 2L1T2P
Pre-Requisites: CSSE2000
Incompatible: COMP3100 or COMP3101 or COMP7100 or COMP7103 or CSSE7011
Course Description: This is a medium advanced course in digital system design. The objective of this course is to give the students the theoretical basis & practical skills in modern design of medium size digital systems in various technologies, including standard circuits & Field Programmable Gate Arrays (FPGAs). The design methodology, systematically introduced & used in the course, is based on simulation & synthesis with the hardware description language (VHDL) tools. Topics covered in this course include: conceptual design step from requirements & specification to simulation & synthesis model in VHDL, design of complex controllers with Finite State Machines, design of sequential blocks with Controller-Datapath methodology, issues in design for testability, issues in timing of sequential logic, overview of implementation technologies with emphasis on FPGAs. All those topics are presented with the theoretical part directly relating to the number of design examples & problems tackled in the tutorials and practicals.
Assumed Background:

This course is a follow up of CSSE2000, all the material covered in CSEE200 is the required background.

If you have not done CSSE2000 please check the CSSE2000 WEB site regarding the covered material.

 

 

1.2 Course Introduction

CSSE3000 and CSSE7011 introduces students to the more advanced concepts, methods and techniques of digital design and is a follow up of CSSE2000 - Introduction to Digital Systems.  You are going to learn modern design methods based on simulation, synthesis and test with VHDL design language. The emphasis is on your ability to solve medium size design problems, describe the solutions with VHDL, simulate, synthesize to Field Programmable Logic and finally test the working hardware.

VHDL is a different environment to what you used in CSSE200. It is industrial standard design methodology supported by all major CAD tool vendors. VHDL is used widely in development of Integrated Circuits by largest IC developers  and forms an essential part of  XILINX development system for  FPGAs.


This course covers: 
        Digital system simulation & synthesis and test with VHDL. 

        Advanced digital system building blocks and their interfaces 

        Electrical & timing issues in digital system design.

1.3 Course Staff

Course Coordinator:  Adam Postula
Phone: 53746     Email: adam@itee.uq.edu.au
Campus: St Lucia Building: General Purpose South (Map)   Room: 604
Consultation:

Consulations:  See course WEB site for details


Tutor:  Peter Crosthwaite
Phone: 33652447     Email: peterc@itee.uq.edu.au
Campus: St Lucia Building: General Purpose South (Map)   Room: 624


1.4 Timetable

Timetables are available on mySI-net.

2. Aims, Objectives & Graduate Attributes

2.1 Course Aims

This course aims at providing solid theoretical background and practical skills in the design of digital systems.
It is expected that upon successful completion of this course, students will:

     Have a sound knowledge of the digital design process and develop a systematic approach to the design of digital systems.

     Have in-depth understanding of combinational and sequential circuits.

     Be able to design a block diagram solution to worded functional description of a medium size digital system.

     Be skillful in modern techniques of digital systems design, specifically the use of VHDL - (Vhsic Hardware Description Language), FSM state diagrams and control-data path methodology.

      Have good understanding of the timing characteristics of devices used in digital systems, and how to determine timing problems and then correct them.

2.2 Learning Objectives

After successfully completing this course you should be able to:


1. ANALYSE
1.1  Analyse a medium size engineering problem to be solved with digital hardware
1.2  Break down the problem into modules of well defined functionality

2. SOLVE
2.1  Formulate a hardware solution on a block level as a connection of modules of well defined functionality
2.2  Develop detailed functionality of modules by either connecting standard components or describing required functionality with VHDL
2.3  Apply structured design methodology based on Controller(FSM)and Data Path.

3. DESIGN AND TEST
3.1  Describe the whole design in VHDL and verify the functionality through simulation
3.2  Synthesize the whole design and integrate with other hardware
3.3  Optimize the design for speed, cost, etc.
3.4  Test the design and modify the design for ease of testing (design for testability)

4. COMMUNICATE
4.1  Relate the technology and methods used in your design to the state of the art in electronics
4.2  Present the principles and explain the details of your design

2.3. Graduate Attributes

Successfully completing this course will contribute to the recognition of your attainment of the following UQ (Undergrad Pass) graduate attributes:

GRADUATE ATTRIBUTELEARNING OBJECTIVES
A. IN-DEPTH KNOWLEDGE OF THE FIELD OF STUDY
A1. A comprehensive and well-founded knowledge in the field of study.1.1, 1.2, 2.1, 2.2, 2.3, 3.1, 3.3, 3.4, 4.1
A4. An understanding of how other disciplines relate to the field of study. 
A5. An international perspective on the field of study. 
B. EFFECTIVE COMMUNICATION
B1. The ability to collect, analyse and organise information and ideas and to convey those ideas clearly and fluently, in both written and spoken forms.4.2
B2. The ability to interact effectively with others in order to work towards a common outcome. 
B3. The ability to select and use the appropriate level, style and means of communication.4.2
B4. The ability to engage effectively and appropriately with information and communication technologies.4.1
C. INDEPENDENCE AND CREATIVITY
C1. The ability to work and learn independently.2.1, 3.1, 3.2, 3.3, 3.4
C3. The ability to generate ideas and adapt innovatively to changing environments. 
C4. The ability to identify problems, create solutions, innovate and improve current practices.1.1, 1.2, 2.1, 2.2, 2.3, 3.1, 3.2, 3.3, 3.4
D. CRITICAL JUDGEMENT
D1. The ability to define and analyse problems.1.1, 2.3, 3.1, 3.2, 3.4
D2. The ability to apply critical reasoning to issues through independent thought and informed judgement.3.3, 3.4, 4.1
D3. The ability to evaluate opinions, make decisions and to reflect critically on the justifications for decisions.1.2, 2.2, 3.3, 3.4, 4.1
E. ETHICAL AND SOCIAL UNDERSTANDING
E1. An understanding of social and civic responsibility. 
E2. An appreciation of the philosophical and social contexts of a discipline. 
E4. A knowledge and respect of ethics and ethical standards in relation to a major area of study. 
E5. A knowledge of other cultures and times and an appreciation of cultural diversity. 

Successfully completing this course will contribute to the recognition of your attainment of the following Engineers Australia graduate attributes:

GRADUATE ATTRIBUTELEARNING OBJECTIVES
1. Ability to apply knowledge of basic science and engineering fundamentals1.1, 4.1
2. Ability to communicate effectively, not only with engineers, but also with the community at large4.2
3. In-depth technical competence in at least one engineering discipline1.2, 2.1, 2.2, 2.3, 3.1, 3.2, 3.3, 3.4
4. Ability to undertake problem identification, formulation and solution1.1, 1.2, 2.1, 2.2, 2.3, 3.1, 3.2, 3.3, 3.4
5. Ability to utilise a systems approach to design and operational performance1.1, 1.2, 2.1, 2.2, 2.3, 3.2, 3.3, 3.4
6. Ability to function effectively as an individual and in multi-disciplinary and multi-cultural teams, with the capacity to be a team leader or manager as well as an effective team member 
7. Understanding of the social, cultural, global and environmental responsibilities of the professional engineer, and for the need for sustainable development 
8. Understanding of the principles of sustainable design and development 
9. Understanding of and commitment to professional and ethical responsibilities 
10. Expectation and capacity to undertake life-long learning 

3. Learning Resources

3.1 Required Resources

Frank Vahid, Digital Design, First Edition, 2007, ISBN 0-470-04437-3 URL
 

3.2 Recommended Resources

Any book on digital system design that includes VHDL.  
 

VHDL for Digital Design; Frank Vahid, Roman Lysecky;   ISBN: 0470052635

 
 
Mark Zwolinski, Digital System Design with VHDL, ISBN 0-201-36063-2  
 

3.3 University Learning Resources

Access to required and recommended resources, plus past central exam papers, is available at the UQ Library website (http://library.uq.edu.au/search/r?SEARCH=CSSE3000).

The University offers a range of resources and services to support student learning. Details are available on the myServices website (https://student.my.uq.edu.au/).

3.4 School of Information Technology and Electrical Engineering Learning Resources

Students enrolled at St Lucia who wish to retain a hard copy of this profile can use the free print quota provided each semester to students enrolled in courses in the School of Information Technology & Electrical Engineering. For information on how to use this print quota, see the School Policy on Student Photocopying and Printing (St Lucia) (http://www.itee.uq.edu.au/about_ITEE/policies/copy-print.html). Students enrolled at the Ipswich campus will either be provided with a hard copy or given directions in class on how to obtain a free copy.

ITEE course websites can be found at http://www.itee.uq.edu.au/~COURSECODE. Many ITEE courses also have Usenet newsgroups, named uq.itee.COURSECODE. Instructions for accessing newsgroups are available at http://studenthelp.itee.uq.edu.au/faq/1stYearFAQ.html#accessnews.

4. Teaching & Learning Activities

4.1 Learning Activities

Date
Activity
Learning Objectives
25 Feb 08 00:00 - 30 May 08 00:00
Tutorials (Tutorial Series): Tutorials 1h/week will cover both theory and practical aspects of digital system design with modern tools and methodology.
Detailed list of topics, time table and teaching materials available on the course WEB site.
Readings/Ref: Vahid, Digital ; zwol vhdl ; vahid digital ; vahid vhdl
1.1, 1.2, 2.1, 2.2, 2.3, 3.1, 3.2, 3.3, 3.4, 4.1, 4.2
25 Feb 08 00:00 - 30 May 08 00:00
Lecture (Lecture Series): Lectures will cover topics in digital system design with modern methodology and tools.
Detailed list of topics, time table and teaching materials available on the course WEB site.
Readings/Ref: Vahid, Digital ; zwol vhdl ; vahid digital ; vahid vhdl
1.1, 1.2, 2.1, 2.2, 2.3, 3.1, 3.2, 3.3, 3.4, 4.1, 4.2
3 Mar 08 00:00 - 30 May 08 00:00
Laboratory Experiments (Laboratory ): Laboratory experiments cover the practical aspects of digital system design. The experiments are based on use of VHDL to design small digital systems on Field Programmable Gate Arrays.
Detailed list of topics, time table and teaching materials available on the course WEB site.
Readings/Ref: Vahid, Digital ; zwol vhdl ; vahid digital ; vahid vhdl
1.1, 1.2, 2.1, 2.2, 2.3, 3.1, 3.2, 3.3, 3.4, 4.1, 4.2

5. Assessment

5.1 Assessment Summary

This is a summary of the assessment in the course. For detailed information on each assessment, see 5.5 Assessment Detail below.

Assessment Task
Due Date
Weighting
Learning Objectives
Practical
Laboratory experiments
3 Mar 08 00:00 - 30 May 08 00:00
work assessed in every prac session
40%
1.1, 1.2, 2.1, 2.2, 2.3, 3.1, 3.2, 3.3, 3.4, 4.1, 4.2
Exam - outside Exam Period (School)
Mid semester exam
16 Apr 08 14:00
tutorial time
20%
1.1, 2.2, 3.3, 4.1
Exam - during Exam Period (Central)
Final examination
Examination Period
40%
1.1, 1.2, 2.1, 2.2, 2.3, 3.1, 3.2, 3.3, 3.4, 4.1, 4.2

5.2 Course Grading


Grade 1, Fail: Fails to demonstrate most or all of the basic requirements of the course:

Achieves less than 20% in all assessments (accumulatively).
Failed to perform to an acceptable standard in the laboratory.
Fails to maintain a laboratory work book.
Unable to undertake small design problems.
Lack of knowledge of the underlying principles and theory.
Shows no interest in solving any problems, waits for the lecturer to show the solution.
Failure to attend or perform in tutorials.



      The minimum percentage required for a grade of 1 is: 0%

Grade 2, Fail: Demonstrates clear deficiencies in understanding and applying fundamental concepts; communicates information or ideas in ways that are frequently incomplete or confusing and give little attention to the conventions of the discipline:

Achieves 20% or more in all assessments (accumulatively).
Failed to attend all laboratory sessions.
Unable to maintain a laboratory workbook to any standard acceptable.
Unable to undertake a simple design exercise.
Lack of working knowledge of the underlying principles and theory.
So overwhelmed by the problem that cannot start any solution.
No contribution in tutorials.



      The minimum percentage required for a grade of 2 is: 20%

Grade 3, Fail: Demonstrates superficial or partial or faulty understanding of the fundamental concepts of the field of study and limited ability to apply these concepts; presents undeveloped or inappropriate or unsupported arguments; communicates information or ideas with lack of clarity and inconsistent adherence to the conventions of the discipline:

Achieves 45% or more in all assessments (accumulatively).
Failed to attend all laboratory sessions
Keeps only rudimentary records in laboratory work book.
Can do some simple design problems.
Indicates some knowledge of the design process.
Indicates a minimal grasp of the underlying principles and theory.
Unable to demonstrate a consistent approach to problem solving.
Attends tutorials and has been known to ask a question during the semester.



      The minimum percentage required for a grade of 3 is: 45%

Grade 4, Pass: Demonstrates adequate understanding and application of the fundamental concepts of the field of study; develops routine arguments or decisions and provides acceptable justification; communicates information and ideas adequately in terms of the conventions of the discipline:

Achives 50% or more in all assessments (accumulatively).
Attends all laboratory sessions.
Maintains a neat laboratory workbook with all preparation completed and all results entered and most working notes present. Can complete simple design problems.
Can start to frame difficult problems into the design process.
Indicates a competent grasp of the underlying principles and theory.
With continuing practice, will develop the problem solving skills.
Contributes to some tutorials.



      The minimum percentage required for a grade of 4 is: 50%

Grade 5, Credit: Demonstrates substantial understanding of fundamental concepts of the field of study and ability to apply these concepts in a variety of contexts; develops or adapts convincing arguments and provides coherent justification; communicates information and ideas clearly and fluently in terms of the conventions of the discipline:

Achieves 65% or more in all assessments (accumulatively).
Attends all laboratory sessions.
Maintains a neat laboratory workbook with all preparation completed, all design notes, ideas and results documented.
Easily completes simple design problems.
Indicates a good grasp of the underlying principles and theory.
Able to perform system decomposition and specify subsystem specifications from a worded system requirement.
Starting to develop a methodical approach to problem solving.
Contributes in many tutorials.



      The minimum percentage required for a grade of 5 is: 65%

Grade 6, Distinction: As for 5, with frequent evidence of originality in defining and analysing issues or problems and in creating solutions; uses a level, style and means of communication appropriate to the discipline and the audience:

Achives 75% or more in all assessments (accumulatively).
Attends all laboratory sessions.
Maintains a neat laboratory workbook with all preparation completed, all design notes, ideas and results documented. .
Almost every experiment works to specifications.
Easily completes relatively simple design problems.
Indicates a total grasp of the underlying principles and theory.
Able to perform system decomposition and specify subsystem specifications from a worded system requirement.
Demonstrates a sound approach to problem solving.
Contributes in most tutorials.



      The minimum percentage required for a grade of 6 is: 75%

Grade 7, High Distinction: As for 6, with consistent evidence of substantial originality and insight in identifying, generating and communicating competing arguments, perspectives or problem solving approaches; critically evaluates problems, their solutions and implications:

Achieves 85% or more in all assessments (accumulatively).
Attends all laboratory sessions.
Maintains a neat laboratory workbook with all preparation completed, all design notes, ideas and results documented.
Almost every experiment works to specifications.
Able to suggest improvements to the experiments or suggest suitable alternatives.
Easily completes medium size  design problems.
Indicates a total grasp of the underlying principles and theory and shows how this knowledge affects various design decisions.
Able to perform system decomposition and specify subsystem specifications from a worded system requirement.
Demonstrates a sound approach to problem solving.
Occassionally able to lead the discussion in the tutorial.



      The minimum percentage required for a grade of 7 is: 85%

Other Requirements & Comments : In order to pass this course you MUST PASS:

1. The laboratory experiments - all sessions attended and at least 20% of course marks achieved

2. The final examination - at least 20% of course marks achieved

In case of failing one or both of the above components the highest grade awarded is limited to grade 3 at 49%.

5.3 Late Submission

No extensions will be granted except in exceptional personal circumstances (documented medical reason or family emergency). Personal hardware or computer failures are not grounds for extension.

5.5 Assessment Detail


Laboratory experiments
Type: Practical
Learning Objectives Assessed: 1.1, 1.2, 2.1, 2.2, 2.3, 3.1, 3.2, 3.3, 3.4, 4.1, 4.2
Due Date:
         3 Mar 08 00:00 - 30 May 08 00:00    work assessed in every prac session
Weight: 40%
Task Description:

Laboratory work in practicals and mini project.


Criteria & Marking:
Students work individually in the laboratory. Students must  make all the experiments to pass this course. Students must complete each experiment according to the detailed description and requirements published on CSSE3000 WEB pages.
Students must maintain a laboratory work book - a  A4 note book with pages that are not easily removed. It should be neat and –even more important -  systematic. The workbook should contain: preparation, prac solution, and prac execution entries for every practical.  Preparation and prac solution entries must be made before the lab session starts.  A tutor can refuse entry to the lab for a student who does not have a workbook or the workbook does not contain sufficient preparation.
Every prac is assessed, the detailed marking criteria specific to each experiment are published on CSSE3000 WEB pages. The achieved mark should be written down in the workbook and signed off by the tutor. It is the student’s responsibility to get all the pracs marked and marks signed off.  

Submission: Work assessed at the end of every lab session by the tutor.
Every prac must be entered in the work book. Detailed requirements described in prac descriptions.

Mid semester exam
Type: Exam - outside Exam Period (School)
Learning Objectives Assessed: 1.1, 2.2, 3.3, 4.1
Due Date:
         16 Apr 08 14:00    tutorial time
Weight: 20%
Perusal: 10 minutes
Duration: 100 minutes
Format: Problem solving
Task Description: Mid semester examination tests the course material covered in the first 6 weeks of the semester.
Criteria & Marking:

Detailed information about mid-semester examination regarding type of questions and marks allocated to each question will be published on CSSE3000 web pages at least two weeks before the exam date.

This exam is closed-book and at least two questions are design problems while the rest can be short questions testing various topics. You may bring a battery-operated non-programmable calculator. Programmable calculators and other computing or communication devices are NOT permitted. You will require a HB pencil and eraser to complete the exam.



Final examination
Type: Exam - during Exam Period (Central)
Learning Objectives Assessed: 1.1, 1.2, 2.1, 2.2, 2.3, 3.1, 3.2, 3.3, 3.4, 4.1, 4.2
Due Date:
         Examination Period
Weight: 40%
Perusal: 15 minutes
Duration: 120 minutes
Format: Problem solving
Task Description:

This final examination tests all the material covered in this course during the whole semester. The emphasis is on testing your design problem solving skills.

This exam is closed-book and at least two questions are design problems while the rest can be short questions testing various topics. You may bring a battery-operated non-programmable calculator. Programmable calculators and other computing or communication devices are NOT permitted. You will require a HB pencil, eraser and 4 colour pens to complete the exam.


Criteria & Marking:

Detailed information about final examination regarding type of questions and marks allocated to each question will be published on CSSE3000 web pages at least two weeks before the exam date.

On the exam paper marks are indicated on each question.  The marks have direct correspondance to the expected time spent on answering the question. All questions need to be answered. Grades are awarded according to published assessment criteria.



6. Policies & Guidelines

 
This section contains the details of and links to the most relevant policies and course guidelines. For further details on University Policies please visit myAdvisor and the University Handbook of Policies and Procedures.

6.1 Assessment Related Policies and Guidelines

University Policies & Guidelines

An overview of the University’s assessment-related policies can be found on myAdvisor (http://www.uq.edu.au/myadvisor/index.html?page=2910).

Academic Integrity
It is the University's task to encourage ethical scholarship and to inform students and staff about the institutional standards of academic behaviour expected of them in learning, teaching and research. Students have a responsibility to maintain the highest standards of academic integrity in their work. Students must not cheat in examinations or other forms of assessment and must ensure they do not plagiarise.

Plagiarism
The University has adopted the following definition of plagiarism:

Plagiarism is the act of misrepresenting as one's own original work the ideas, interpretations, words or creative works of another. These include published and unpublished documents, designs, music, sounds, images, photographs, computer codes and ideas gained through working in a group. These ideas, interpretations, words or works may be found in print and/or electronic media.

Students are encouraged to read the UQ Academic Integrity and Plagiarism policy (http://www.uq.edu.au/hupp/index.html?page=25128) which makes a comprehensive statement about the University's approach to plagiarism, including the approved use of plagiarism detection software, the consequences of plagiarism and the principles associated with preventing plagiarism.

Feedback on Assessment
Feedback is essential to effective learning and students can expect to receive appropriate and timely feedback on all assessment. For a detailed explanation of the feedback you are entitled to, you should consult the policy on Student Access to Feedback on Assessment. (http://www.uq.edu.au/hupp/index.html?page=25114&pid=25075)

As a student you have a responsibility to incorporate feedback into your learning; make use of the assessment criteria that you are given; be aware of the rules, policies and other documents related to assessment; and provide teachers with feedback on their assessment practices.

There are certain steps you can take if you feel your result does not reflect your performance. Please refer to the myAdvisor web site. (http://www.uq.edu.au/myadvisor/index.html?page=2953&pid=2910)

School of Information Technology and Electrical Engineering Assessment Guidelines

Misconduct

Further to the statement on academic integrity and plagiarism above, students are required to read and understand the ITEE policy on Student Misconduct (http://www.itee.uq.edu.au/about_ITEE/policies/student-misconduct.html).

Late Arrival or Non-attendance at Examinations

The policy and procedure for late arrival or non-attendance at centrally controlled examinations is set out in the University's Examinations policy (HUPP 3.30.5), sections 8 and 10.2.

The way in which late arrival at a School-controlled examination is dealt with will be at the discretion of the course coordinator, who may be guided by the policy for centrally controlled exams.

In the case that a student requests a special exam for a School-controlled exam, the request will be considered and, if allowed, the timing shall be determined by the course coordinator, in consultation with the School's Chief Examiner where necessary, and in accordance with HUPP 3.30.5. Unless otherwise indicated in the Course Profile, applications must be made in writing to the Head of School no later than one week after the exam. Late applications will not be accepted.
 
Examination Feedback
 
In addition to the advice above, students wishing to view examination answer scripts and/or question papers should consult with the School office (Room 217, General Purpose South Building [78], St Lucia; Room 218, Building 1, Ipswich) regarding arrangements. The ITEE policy on exam script viewing is available at http://study.itee.uq.edu.au/current_students/exam_script_viewing.html.

Supplementary Assessment

If you fail this course you may be eligible for supplementary assessment - see the general award rules and/or your program rules for details. You should note that even though you may be eligible for supplementary assessment under these rules, in some circumstances there may be no practical assessment that can be offered to allow you to meet the minimum passing requirements. These circumstances may include failure based on:
  • group or team based assessment;
  • attendance or class participation requirements;
  • laboratory-based assessment, where laboratories can't practically be made available after classes have finished;
  • project or thesis-based assessment, where a significant period of time would be required to undertake supplementary assessment;
  • progressive assessment, where subsequent assessment items build on earlier assessment items; or
  • multiple assessment items, where it is impractical to offer multiple supplementary assessment items.
If the course coordinator determines that there is no practical supplementary assessment that can be offered to allow you to improve your grade, then you will not be offered supplementary assessment and your grade will remain unchanged.

6.2 Other Policies and Guidelines

University Policies and Guidelines

Placement Courses
Students on a placement course – also known as a work placement, internship, industry study, industry experience, clinical practice, clinical placement, practical work, practicum, fieldwork, teaching practice – should refer to the University policy, Placement Courses (http://www.uq.edu.au/hupp/index.html?page=25120&pid=25075) for detailed information.
 
Working with Children
Students whose studies include a professional/work placement, internship, clinical practice, teaching practice or other similar activity which involves them in regular contact with children should refer to the University policy, Working with Children Check - "blue card" (http://www.uq.edu.au/hupp/index.html?page=25004&pid=24963) to find out how to apply for a ‘blue card’.
 
Students with a Disability
Any student with a disability who may require alternative academic arrangements, including assessment, in the course/program is encouraged to seek advice at the commencement of the semester from a Disability Adviser at Student Support Services. Refer to the University policy, Students with a Disability (Disability Action Plan) (http://www.uq.edu.au/hupp/index.html?page=25122&pid=25075) and to the policy on Special Arrangements for Examinations for Students with a Disability (http://www.uq.edu.au/hupp/index.html?page=25111&pid=25075

Where an adjustment is made to an accredited program, it is the responsibility of the relevant Faculty to liaise with professional and registration bodies regarding the acceptability of the change/s.  

Occupational Health and Safety
Undergraduate Students (http://www.uq.edu.au/hupp/index.html?page=25055&pid=25015) and Postgraduate Students (http://www.uq.edu.au/hupp/index.html?page=25057&pid=25015) should be familiar with the University policies on occupational health and safety in the laboratory.

Other School of Information Technology and Electrical Engineering Guidelines

Ethical Clearance
If your course involves assignment or project work involving human subjects or human-related materials, you must investigate the need for ethical clearance and obtain it when required. Information on ethical clearance can be found at http://www.uq.edu.au/research/orps/index.html?page=5064&pid=5256.

Other Course Guidelines

GENERAL COURSE RULES

1. The teaching team is to help you learn not to forcibly feed you with information. It is up to you to utilize this resource for your advantage. Be the active learner, participate in not only attend, tutorials and lectures.

2. We do appreciate your feedback. Talk to the lecturer about problems you experience ASAP. If you postpone it you only make things worse.

3. Laboratory experiments are the essential part of this course, be sure you perform.

4. Tutorial solutions are not published, the best way to get them is participate in tutorials.

5. You must pass laboratory experiments and final exam to pass this course.

LABORATORY RULES

1. There are 9 practicals in this course and ALL must be made.
2. Practicals are performed individually and  ALL are assessed.
3. Only one practical experiment can be done in one session.

4. You can participate and get assessed only in the scheduled session to which you signed on.

5. You can access the laboratory at other times when the tutor is there and lets you in, but you will not be asssessed and tutor help given to you can be very limited. It is still advisable since you can practise with XILINX hardware.

6. If you miss a prac, due to e.g. health or family or other serious problems,  you can make it up in the scheduled catch up session. You need to obtain permission of the lecturer to do it prior to the session. Only one prac can be made up in one session and only three pracs can be made up in the semester.  If you are about to miss a prac think twice as it MUST be made if you are to pass this course.  

7. Preparation for the practical session is compulsory and will be assessed. Take this seriously, pracs are substantial and without preparation finishing in time would be very difficult.

8. You must install WEBPack v 6.3 (Xilinx design software) on your home computer to be able to prepare for practicals.
9. Laboratory workbook (hardbound) must be maintained and is a component of the assessment. Each practical should have entry with preparation, execution and conclusions.  
10. Proper covered shoes must be worn in the laboratory. Students not wearing proper shoes will be asked to leave the laboratory.

ASSESSMENT FEEDBACK

1. The CSSE3000 teaching team strives to provide feedback on students work as soon as possible:

In every laboratory session directly when assessing the prac.
In tutorials when students present their solutions.
In consultations where students can present and discuss their designs
In the tutorial following midsemester exam; the exam questions and solutions are discussed.
The final exam results can be discussed with the lecturer after script viewing.


Learning Summary

 

Below is a table showing the relationship between the learning objectives for this course and the broader graduate attributes developed, the learning activities used to develop each objective and the assessment task used to assess each objective.

Learning Objectives

After successfully completing this course you should be able to:

1. ANALYSE
1.1  Analyse a medium size engineering problem to be solved with digital hardware
1.2  Break down the problem into modules of well defined functionality
2. SOLVE
2.1  Formulate a hardware solution on a block level as a connection of modules of well defined functionality
2.2  Develop detailed functionality of modules by either connecting standard components or describing required functionality with VHDL
2.3  Apply structured design methodology based on Controller(FSM)and Data Path.
3. DESIGN AND TEST
3.1  Describe the whole design in VHDL and verify the functionality through simulation
3.2  Synthesize the whole design and integrate with other hardware
3.3  Optimize the design for speed, cost, etc.
3.4  Test the design and modify the design for ease of testing (design for testability)
4. COMMUNICATE
4.1  Relate the technology and methods used in your design to the state of the art in electronics
4.2  Present the principles and explain the details of your design


Assessment & Learning Activities

  Learning Objectives
  1.1 1.2 2.1 2.2 2.3 3.1 3.2 3.3 3.4 4.1 4.2
Learning Activities
Tutorials (Tutorial Series)
selected
selected
selected
selected
selected
selected
selected
selected
selected
selected
selected
Lecture (Lecture Series)
selected
selected
selected
selected
selected
selected
selected
selected
selected
selected
selected
Laboratory Experiments (Laboratory )
selected
selected
selected
selected
selected
selected
selected
selected
selected
selected
selected
Assessment Tasks
Laboratory experiments
selected
selected
selected
selected
selected
selected
selected
selected
selected
selected
selected
Mid semester exam
selected
   
selected
     
selected
 
selected
 
Final examination
selected
selected
selected
selected
selected
selected
selected
selected
selected
selected
selected

Graduate Attributes

Successfully completing this course will contribute to the recognition of your attainment of the following UQ (Undergrad Pass) graduate attributes:

  Learning Objectives
  1.1 1.2 2.1 2.2 2.3 3.1 3.2 3.3 3.4 4.1 4.2
Graduate Attributes
A IN-DEPTH KNOWLEDGE OF THE FIELD OF STUDY
A1. A comprehensive and well-founded knowledge in the field of study.
selected
selected
selected
selected
selected
selected
 
selected
selected
selected
 
A4. An understanding of how other disciplines relate to the field of study.                      
A5. An international perspective on the field of study.                      
B EFFECTIVE COMMUNICATION
B1. The ability to collect, analyse and organise information and ideas and to convey those ideas clearly and fluently, in both written and spoken forms.                    
selected
B2. The ability to interact effectively with others in order to work towards a common outcome.                      
B3. The ability to select and use the appropriate level, style and means of communication.                    
selected
B4. The ability to engage effectively and appropriately with information and communication technologies.                  
selected
 
C INDEPENDENCE AND CREATIVITY
C1. The ability to work and learn independently.    
selected
   
selected
selected
selected
selected
   
C3. The ability to generate ideas and adapt innovatively to changing environments.                      
C4. The ability to identify problems, create solutions, innovate and improve current practices.
selected
selected
selected
selected
selected
selected
selected
selected
selected
   
D CRITICAL JUDGEMENT
D1. The ability to define and analyse problems.
selected
     
selected
selected
selected
 
selected
   
D2. The ability to apply critical reasoning to issues through independent thought and informed judgement.              
selected
selected
selected
 
D3. The ability to evaluate opinions, make decisions and to reflect critically on the justifications for decisions.  
selected
 
selected
     
selected
selected
selected
 
E ETHICAL AND SOCIAL UNDERSTANDING
E1. An understanding of social and civic responsibility.                      
E2. An appreciation of the philosophical and social contexts of a discipline.                      
E4. A knowledge and respect of ethics and ethical standards in relation to a major area of study.